A Scalable Coherent Interface (SCI) Based System coherency flow requires multiple memory accesses. Each access takes many cycles, and therefore, the entire flow takes a great deal of time. The bandwidth of the SCI based system, designed with only one outstanding request, is determined by the latency of each flow. Even though in this type of system, the wires themselves are rated at gigabytes per second, the actual useful bandwidth for each node is limited to closer to 30 to 40 megabytes per second. The reason for this, is that the existing system has enough resources in the SCI controller to handle only one request or response at a time.
Therefore, there is a need in the art for a method and system that will use more of the available bandwidth of the system by allowing the system to have more than one outstanding request.